The CPU: Fetch, Decode, Execute

Machine instructions are tiny: load this memory address into a register, add two registers, compare, jump somewhere else if the result was zero. Registers are the CPU's hands — a few dozen ultra-fast storage slots (64 bits each on modern machines) where all actual work happens. The program counter register holds the address of the next instruction; jumps just overwrite it.

; What 'x = a + b' compiles to (x86-64 assembly):
mov  rax, [a]      ; fetch a from memory into register rax
add  rax, [b]      ; add b's value to it
mov  [x], rax      ; store the result back to memory

; What 'if (x == 0) goto done' looks like:
cmp  rax, 0        ; compare, sets CPU flags
je   done          ; 'jump if equal' — reads the flags

; A loop is a compare and a backwards jump:
loop_start:
  dec  rcx         ; count down
  jnz  loop_start  ; jump if not zero

Clock speed (say 3 GHz — 3 billion cycles per second) sets the rhythm, but modern CPUs don't do one instruction per cycle. They pipeline (overlap the fetch/decode/execute stages of many instructions like an assembly line), execute out of order when instructions don't depend on each other, and are superscalar (multiple instructions per cycle). A modern core juggles hundreds of instructions in flight.

# See it yourself — compile and disassemble:
cat > tiny.c << 'EOF'
int add(int a, int b) { return a + b; }
EOF
gcc -O1 -c tiny.c && objdump -d tiny.o

# Output includes:
#   lea eax, [rdi+rsi]     <- the entire function: one instruction
# (or paste the C into https://godbolt.org)